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HT45F56 Arkusz danych(PDF) 35 Page - Holtek Semiconductor Inc |
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HT45F56 Arkusz danych(HTML) 35 Page - Holtek Semiconductor Inc |
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35 / 90 page ![]() Rev. 1.11 34 April 11, 2017 Rev. 1.11 35 April 11, 2017 HT45F56 Shock Detector Flash MCU HT45F56 Shock Detector Flash MCU SLOW Mode to NORMAL Mode Switching InSLOWmodethesystemclockisderivedfromfSUB.ToswitchbacktotheNORMALMode, wherethehighspeedsystemoscillatorisused,theHLCLKbitshouldbesetto“1”orHLCLKbitis “0”buttheCKS2~CKS0fieldissetto“01x”or“1xx”.Asacertainamountoftimewillberequired forthehighfrequencyclocktostablise,thestatusoftheHTObitischecked. NORMAL Mode SLOW Mode or HLCLK=1 SLEEP0 Mode IDLEN=0, WDT off HALT instruction is executed SLEEP1 Mode IDLE0 Mode IDLE1 Mode CKS2~CKS0 ≠ 00x as HLCLK=0 IDLEN=0, WDT on HALT instruction is executed IDLEN=1, FSYSON=0 HALT instruction is executed IDLEN=1, FSYSON=1 HALT instruction is executed Entering the SLEEP0 Mode ThereisonlyonewayforthedevicetoentertheSLEEP0Modeandthatistoexecutethe“HALT” instructionintheapplicationprogramwiththeIDLENbitintheSMODregisterequalto“0”andthe WDTisoff.Whenthisinstructionisexecutedundertheconditionsdescribedabove,thefollowing willoccur: • Thesystemclock,WDTclockandTimeBaseclockwillbestoppedandtheapplicationprogram willstopatthe"HALT"instruction. • TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition. • TheI/Oportswillmaintaintheirpresentconditions. • Inthestatusregister,thePowerDownflagPDFwillbeset,andWDTtimeoutflagTOwillbe cleared. • TheWDTwillbeclearedandstoppedastheWDTisdisabled. |
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