MPC7457EC datasheet(9/68 Pages) FREESCALE

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MPC7457 RISC Microprocessor Hardware Specifications, Rev. 5

Freescale Semiconductor

Comparison with the MPC7455, MPC7445, MPC7450, MPC7451, and MPC7441

Parity on I cache

Word

Parity on D cache

Byte

Number of D cache misses (load/store)

5/1

Data stream touch engines

4 streams

On-Chip Cache Features

Cache level

Size/associativity

512-Kbyte/8-way

256-Kbyte/8-way

Access width

256 bits

Number of 32-byte sectors/line

Parity

Byte

Off-Chip Cache Support 1

Cache level

Total SRAM space supported

1 MB, 2MB, 4 MB 2

1 MB, 2 MB

On-chip tag logical size (cache space)

1 MB, 2 MB

Associativity

8-way

Number of 32-byte sectors/line

2, 4

Off-Chip data SRAM support

MSUG2 DDR, LW, PB2

Data path width

Direct mapped SRAM sizes

1 MB, 2 MB, 4 MB

1 MB, 2 MB

Parity

Byte

Notes:

Not implemented on MPC7447, MPC7445, or MPC7441.

The MPC7457 supports up to 4 MB of SRAM, of which a maximum of 2 MB can be configured as cache memory; the

remaining 2 MB may be unused or configured as private memory.

Table 1. Microarchitecture Comparison (continued)

Microarchitectural Specs

MPC7457/MPC7447

MPC7455/MPC7445

MPC7450/MPC7451/

MPC7441

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