7

the external load, V

its rate of increase determined by the value of

the external capacitor, C8 (figure1), and the

value of the internal current source, I5. V

rate of increase follows V

exceeds V

MOSFET, drain current I

rate of increase of I

of increase of V

size of C5 , the total filter capacitance of the

load. Note that this rate, which is directly

proportional to C7 and inversely proportional to

C8, could be adjusted . Similarly the Toff-delay

can be adjusted and is directly proportional to

the size of C7.

DEVICE OPERA

DEVICE OPERA

DEVICE OPERA

DEVICE OPERA

DEVICE OPERATION*

TION*

TION*

TION*

TION*

A hot swap operation involves removal and

reinsertion of a device while the system using

it remains in operation. Such an operation

could cause external capacitors to draw cur-

rents high enough to disturb system operations

or even cause permanent damage to both the

device and the system.

The IXHQ100 is designed to prevent any distur-

bances or damage during such occurrences,

allowing the circuit board to be safely inserted

and removed from a live backplane. Capable of

operating under three modes, the chip also acts

as a power active noise filter and an auto-detect

circuit.

Once power is applied, the IXHQ100 starts up

but does not immediately apply power to the

output load. The internal Power Up Reset logic

(see in Figure 2) turns on for 10

µs prior to any

other logic. This pulse goes through two NOR

gates and resets SRFF1 Flip Flop. Once SRFF1

is reset, the current source, I6, charges the

OFFTM pin at a rate proportional to the size of

the external capacitor, C7 (fig 1). During the time

the OFFTM pin is ramping from 0V to Vrf (~5V),

which is the T

off-delay

off-delay

off-delay

off-delay

,,,, COMP1 keeps N3 ON so

V

off-delay

off-delay

off-delay

,,,, V

OFFTM

OFFTM

OFFTM

OFFTM

greater than Vrf, and COMP1 goes low, driving

N3 to off state. I5 now starts to charge C1,

ramping +ve i/p of OA4. OA4 buffers V

sets the GATE output ramp.

It is assumed that when the circuit board is first

inserted into the backplane, the voltage across

Inser

Inser

Inser

Inser

Insertion Pr

tion Pr

tion Pr

tion Pr

tion Process

ocess

ocess

ocess

ocess

As the circuit board is inserted into the

backplane, physical connections should be

made to ground to discharge any electrostatic

voltage. The insertion process begins when

power and ground are supplied to the board

through pins on the blackplane.

IXHQ 100PI

IXHQ 100SI

Normal Operation

Normal Operation

Normal Operation

Normal Operation

Normal Operation

Flip-flop setting and resetting

Flip-flop setting and resetting

Flip-flop setting and resetting

Flip-flop setting and resetting

Flip-flop setting and resetting

*Unless otherwise stated, all symbol and device references are referred to the logic diagram (Fig 2) on page 6

The flip-flop, SRFF1 (fig 2), used in the IXHQ100,

is reset dominant. Hence when both S and R

inputs are driven high, the SRFF1 remains

reset. Under normal operation, S input becomes

high whenever OR1 output is high and R input

is low. In turn, OR1 goes high if any one of the

outputs of EXOR1, or COMP2, or COMP3

goes high.

EXOR1 output goes high if it detects the loss of

either Gnd or -Vin. If INV input is connected to

With continuous –V

acts as an active power filter by modulating the

voltage drop across the external Power

MOSFET V

ds

so that any noise on –V

in

is

cancelled by V

The direct connection of IXHQ 100’s AGND pin

to –V

to set the ~90% of the maximum peak noise

voltage reject by the IXHQ100. The internal

V

noise rejection. Graph on page 5 illustrates the

level of ripple attenuation during normal

conditions. Notice that the noise rejection is very

high (~60db) between 400Hz to 40KHz, which is

optimal for most hot swap applications.