ADAV801ASTZ datasheet(50/61 Pages) AD

50 / 61 page

ADAV801

Rev. A | Page 49 of 60

DAC Right Peak Volume—Address 1101011 (0x6B)

Table 110. DAC Right Peak Volume Register Bit Map

Reserved

DRP5

DRP4

DRP3

DRP2

DRP1

DRP0

Table 111. DAC Right Peak Volume Register Bit Descriptions

Bit Name

Description

DRP[5:0]

DAC right channel peak volume detection.

000000 = 0 dBFS.

000001 = −1 dBFS.

111111 = −63 dBFS.

ADC Left Channel PGA Gain—Address 1101100 (0x6C)

Table 112. ADC Left Channel PGA Gain Register Bit Map

Reserved

AGL5

AGL4

AGL3

AGL2

AGL1

AGL0

Table 113. ADC Left Channel PGA Gain Register Bit Descriptions

Bit Name

Description

AGL[5:0]

PGA left channel gain control.

000000 = 0 dB.

000001 = 0.5 dB.

…

101111 = 23.5 dB.

110000 = 24 dB.

…

111111 = 24 dB.

ADC Right Channel PGA Gain—Address 1101101 (0x6D)

Table 114. ADC Right Channel PGA Gain Register Bit Map

Reserved

AGR5

AGR4

AGR3

AGR2

AGR1

AGR0

Table 115. ADC Right Channel PGA Gain Register Bit Descriptions

Bit Name

Description

AGR[5:0]

PGA right channel gain control.

000000 = 0 dB.

000001 = 0.5 dB.

…

101111 = 23.5 dB.

110000 = 24 dB.

…

111111 = 24 dB.

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