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54LS160AFMQB Arkusz danych(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Numer części 54LS160AFMQB
Szczegółowy opis  Synchronous Presettable BCD Decade Counters
PDF  8 Pages
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Producent  NSC [National Semiconductor (TI)]
Strona internetowa  http://www.national.com
Logo NSC - National Semiconductor (TI)

54LS160AFMQB Arkusz danych(HTML) 4 Page - National Semiconductor (TI)

  54LS160AFMQB Datasheet HTML 1Page - National Semiconductor (TI) 54LS160AFMQB Datasheet HTML 2Page - National Semiconductor (TI) 54LS160AFMQB Datasheet HTML 3Page - National Semiconductor (TI) 54LS160AFMQB Datasheet HTML 4Page - National Semiconductor (TI) 54LS160AFMQB Datasheet HTML 5Page - National Semiconductor (TI) 54LS160AFMQB Datasheet HTML 6Page - National Semiconductor (TI) 54LS160AFMQB Datasheet HTML 7Page - National Semiconductor (TI) 54LS160AFMQB Datasheet HTML 8Page - National Semiconductor (TI)  
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Functional Description (Continued)
The Terminal Count (TC) output is HIGH when CET is HIGH
and the counter is in its maximum count state (9 for the
decade counters 15 for the binary counters) To implement
synchronous multistage counters the TC outputs can be
used with the CEP and CET inputs in two different ways
These two schemes are shown in the 9310 data sheet The
TC output is subject to decoding spikes due to internal race
conditions and is therefore not recommended for use as a
clock or asynchronous reset for flip-flops counters or regis-
ters In the decade counters of the ’LS160 ’LS162 the TC
output is fully decoded and can only be HIGH in state 9
LOGIC EQUATIONS
Count Enable e CEP
 CET  PE
TC e Q0
 Q1  Q2  Q3  CET
Mode Select Table
SR
PE
CET
CEP
Action on the Rising
Clock Edge (
L )
L
X
X
X
RESET (Clear)
H
L
X
X
LOAD (Pn
xQn)
H
H
H
H
COUNT (Increment)
H
H
L
X
NO CHANGE (Hold)
H
H
X
L
NO CHANGE (Hold)
For the ’LS162
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
State Diagrams
’LS160 ’LS162
TLF10177 – 5
4



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