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M95640 Arkusz danych(PDF) 13 Page - STMicroelectronics |
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M95640 Arkusz danych(HTML) 13 Page - STMicroelectronics |
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13 / 39 page ![]() 13/39 M95640, M95320 Figure 10. Write Disable (WRDI) Sequence Write Disable (WRDI) One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction to the device. As shown in Figure 10, to send this instruction to the device, Chip Select (S) is driven Low, and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then enters a wait state. It waits for a the device to be deselected, by Chip Select (S) be- ing driven High. The Write Enable Latch (WEL) bit, in fact, be- comes reset by any of the following events: – Power-up – WRDI instruction execution – WRSR instruction completion – WRITE instruction completion. C D AI03750D S Q 2 1 34567 High Impedance 0 Instruction |
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