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HCF40193BEY Arkusz danych(PDF) 2 Page - STMicroelectronics |
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HCF40193BEY Arkusz danych(HTML) 2 Page - STMicroelectronics |
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2 / 12 page ![]() HCF40193B 2/12 one-half clock cycle after the counter reaches its minimum count in the count-down mode. The cascading of multiple packages is easily accomplished without the need for additional external circuitry by tying the BORROW and CARRY outputs to the CLOCK DOWN and CLOCK UP inputs, respectively, of the following package. IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION FUNCTIONAL DIAGRAM PIN No SYMBOL NAME AND FUNCTION 3, 2, 6, 7 Q1 to Q4 Flip-Flop Outputs 4 CLOCK DOWN Clock Down Input 5 CLOCK UP Clock Up Input 11 PRESET ENABLE Preset Enable Input 12 CARRY Count Up (Carry) 13 BORROW Count Down (Borrow) 14 RESET Reset Input 15, 1, 10, 9 J1 to J4 Data Input 8 VSS Negative Supply Voltage 16 VDD Positive Supply Voltage |
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