IIS2DH datasheet(34/49 Pages) STMICROELECTRONICS

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IIS2DH

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DocID027668 Rev 2

7.7

CTRL_REG2 (21h)

The bandwidth of the high-pass filter depends on the selected ODR and on the settings of

the HPCFx bits of CTRL_REG2. The high-pass filter cutoff frequencies (ft) are shown in

Table 32.

Table 29. CTRL_REG2 register

HPM1

HPM0

HPCF2

HPCF1

FDS

HPCLICK

HPIS2

HPIS1

Table 30. CTRL_REG2 description

HPM[1:0]

High-pass filter mode selection. Default value: 00

Refer to Table 31 for filter mode configuration

HPCF[2:1]

High-pass filter cutoff frequency selection. Refer to Table 32.

FDS

Filtered data selection. Default value: 0

(0: internal filter bypassed; 1: data from internal filter sent to output register and FIFO)

HPCLICK

High-pass filter enable for CLICK function.

(0: filter bypassed; 1: filter enabled)

HPIS2

High-pass filter enable for AOI function on Interrupt 2.

(0: filter bypassed; 1: filter enabled)

HPIS1

High-pass filter enable for AOI function on Interrupt 1.

(0: filter bypassed; 1: filter enabled)

Table 31. High-pass filter mode configuration

HPM1

HPM0

High-pass filter mode

Normal mode (reset by reading REFERENCE/DATACAPTURE (26h) register)

Reference signal for filtering

Normal mode

Autoreset on interrupt event

Table 32. Low-power mode - high-pass filter cutoff frequency

HPCF[2:1]

ft [Hz]

@ 1 Hz

ft [Hz]

@ 10 Hz

ft [Hz]

@ 25 Hz

ft [Hz]

@ 50 Hz

ft [Hz]

@ 100 Hz

ft [Hz]

@ 200Hz

ft [Hz]

@ 400 Hz

ft [Hz]

@ 1.6kHz

ft [Hz]

@ 5kHz

0.02

0.2

0.5

100

0.008

0.08

0.2

0.5

0.004

0.04

0.1

0.2

0.5

0.002

0.02

0.05

0.1

0.2

0.5

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