LTC4236 datasheet(16/24 Pages) LINER

16 / 24 page

LTC4236

4236f

For more information www.linear.com/LTC4236

applicaTions inForMaTion

An undervoltage fault occurs if the diode-OR output sup-

ply falls below its undervoltage threshold. If the ON pin

voltage falls below 1.155V but remains above 0.6V, the

Hot Swap MOSFET is turned off by a 2mA pull-down from

HGATE to ground. The Hot Swap MOSFET turns back on

instantly without the debounce cycle when the diode-OR

output supply rises above its undervoltage threshold.

However, if the ON pin voltage drops below 0.6V, it turns

off the Hot Swap MOSFET and clears the fault latch. The

Hot Swap MOSFET turns back on only after a debounce

cycle when the diode-OR output supply is restored above

its undervoltage threshold.

During the undervoltage fault condition, FAULT will not

be pulled low but PWRGD will be pulled high as HGATE

is pulled low. The ideal diode function controlled by the

ideal diode MOSFET is not affected by the undervoltage

(UV) fault condition.

Power Good Monitor

Internal circuitry monitors the MOSFET gate overdrive

between the HGATE and OUT pins. Also, the FB pin that

connects to OUT through a resistive divider is used to

determine a power good condition. The power good

comparator drives high when the FB pin rises above

1.235V, and drives low when FB falls below 1.215V. The

power good status for the input supply is reported via an

open-drain output, PWRGD. It is normally pulled high by

an external pull-up resistor or the internal 10µA pull-up.

The PWRGD pin pulls low when the FB power good com-

parator is high and the HGATE drive exceeds 4.2V. The

PWRGD pin goes high when the HGATE is turned off by

the ON or EN pins, or when the FB power good comparator

drives low, or when INTVCC enters undervoltage lockout.

Current Sense Monitor

The current through the external sense resistor is moni-

tored by LTC4236’s current sense amplifier at the CS+

and SENSE– pins (see Figure 5). The amplifier uses

auto-zeroing circuitry to achieve an offset below 150µV

over temperature, sense voltage and input supply volt-

age. The frequency of the auto-zero clock is 10kHz. An

internal resistor RIN is connected between the amplifier’s

negative input terminal and CS+ pin. The sense amplifier

loop forces the negative input terminal to have the same

potential as SENSE– and that develops a potential across

RIN to be the same as the sense voltage VSENSE. A cor-

responding current, VSENSE/RIN, will flow through RIN.

The high impedance inputs of the sense amplifier will not

conduct this input current, allowing it to flow through an

internalMOSFETtoaresistorROUTconnectedbetweenthe

IMON and GND pins. The IMON output voltage is equal to

(ROUT/RIN) • VSENSE. The resistor ratio ROUT/RIN defines

the voltage gain of the sense amplifier and is set to 100

with RIN = 200Ω and ROUT = 20k. Full scale input sense

voltage to the sense amplifier is 25mV, corresponding to

an output of 2.5V. For input supply voltages greater than

0.1µF

10µF

IMON VOUT

ILOAD

VCC

RIN

200

12V

0.1µF

VSENSE

ROUT

20k

2-WIRE I2C

INTERFACE

LTC4236

4236 F05

HGATE

LOAD

SENSE+

REF+

REF–

SENSE–

GND

REG

SCL

SDA

LTC2451

VOUT = ––––– • VSENSE = 100 • VSENSE

ROUT

RIN

CS+

Figure 5. High Side Current Monitor with LTC2451 ADC

LTC4236 Arkusz danych(PDF) 16 Page - Linear Technology

LTC4236 Arkusz danych(HTML) 16 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Arkusz danych Pobierz

Link URL