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TSL27721 Arkusz danych(PDF) 32 Page - ams AG |
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TSL27721 Arkusz danych(HTML) 32 Page - ams AG |
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32 / 56 page ![]() Page 32 ams Datasheet Document Feedback [v1-00] 2016-Aug-26 TSL2772 − Principles O f Operation ALS Time Register (0x01) The ALS time register controls the internal integration time of the ALS channel ADCs in 2.73 ms increments. Upon power up, the ALS time register is set to 0xFF. Figure 33: ALS Integration Time Register Proximity Time Register (0x02) The proximity timing register controls the integration time of the proximity ADC in 2.73 ms increments. Upon power up, the proximity time register is set to 0xFF. It is recommended that this register be programmed to a value of 0xFF (1 integration cycle). Figure 34: Proximity Integration Time Control Register Field Bits Description ATIME 7:0 VALUE INTEG_CYCLES TIME MAX COUNT 0xFF 1 2.73 ms 1024 0xF6 10 27.3 ms 10240 0xDB 37 101 ms 37888 0xC0 64 175 ms 65535 0x00 256 699 ms 65535 Field Bits Description PTIME 7:0 VALUE INTEG_CYCLES TIME MAX COUNT 0xFF 1 2.73 ms 1023 |
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