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ADL5240ACPZ-R7 Arkusz danych(PDF) 20 Page - Analog Devices |
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ADL5240ACPZ-R7 Arkusz danych(HTML) 20 Page - Analog Devices |
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20 / 28 page ![]() ADL5240 Data Sheet Rev. A | Page 20 of 28 LOOP PERFORMANCE The ADL5240 can beconfigured sothateither theDSAprecedes the amplifier (see Figure 37)or the amplifier precedesthe DSA (see Figure 38). The performanceof the loop configurationsis presented in Figure 20 toFigure27. To improvetheoverall return loss, a shunt capacitor can be placed between the amplifier and DSA. This helps to align the phases of the two blocks. NC VDD NC NC NC DSAOUT NC NC NC NC VDD DSAIN ADL5240 NC NC NC NC SERIAL PARALLEL INTERFACE 68pF 100pF 1.2nF 470nH VDD VDD 0.1µF RFOUT RFIN 100pF 1µF VCC 0.1µF C1 C2 C3 C4 C5 C6 C7 L1 1 2 3 4 5 6 7 8 9 10 16 15 14 13 12 11 24 23 22 21 20 19 18 17 32 31 25 26 27 28 29 30 Figure 37. DSA-AMP Loop Configuration |
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