ADAU1361BCPZ-R7 datasheet(16/80 Pages) AD

16 / 80 page

ADAU1361

Data Sheet

Rev. D | Page 16 of 80

Pin No.

Mnemonic

Type1

Description

RHP

A_OUT

Right Headphone Output. Biased at AVDD/2.

LHP

A_OUT

Left Headphone Output. Biased at AVDD/2.

MONOOUT

A_OUT

Mono Output or Virtual Ground for Capless Headphone. Biased at AVDD/2 when set as mono

output.

AGND

PWR

Analog Ground. The AGND and DGND pins can be tied together on a common ground plane.

AGND should be decoupled locally to AVDD with a 100 nF capacitor.

AVDD

PWR

1.8 V to 3.3 V Analog Supply for ADC, Output Driver, and Input to Digital Supply Regulator.

This pin should be decoupled locally to AGND with a 100 nF capacitor.

DVDDOUT

PWR

Digital Core Supply Decoupling Point. The digital supply is generated from an on-board

regulator and does not require an external supply. DVDDOUT should be decoupled to DGND

with a 100 nF capacitor and a 10 μF capacitor.

DGND

PWR

Digital Ground. The AGND and DGND pins can be tied together on a common ground plane.

DGND should be decoupled to DVDDOUT and to IOVDD with 100 nF capacitors and 10 μF

capacitors.

ADC_SDATA

D_OUT

ADC Serial Output Data.

DAC_SDATA

D_IN

DAC Serial Input Data.

BCLK

D_IO

Serial Data Port Bit Clock.

LRCLK

D_IO

Serial Data Port Frame Clock.

ADDR1/CDATA

D_IN

I2C Address Bit 1 (ADDR1).

SPI Data Input (CDATA).

SDA/COUT

D_IO

I2C Data (SDA). This pin is a bidirectional open-collector input/output. The line connected to

this pin should have a 2 kΩ pull-up resistor.

SPI Data Output (COUT). This pin is used for reading back registers and memory locations. It is

three-state when an SPI read is not active.

SCL/CCLK

D_IN

I2C Clock (SCL). This pin is always an open-collector input when in I2C control mode. The line

connected to this pin should have a 2 kΩ pull-up resistor.

SPI Clock (CCLK). This pin can run continuously or be gated off between SPI transactions.

Exposed Pad

Exposed Pad. The exposed pad is connected internally to the ADAU1361 grounds. For

increased reliability of the solder joints and maximum thermal capability, it is recommended

that the pad be soldered to the ground plane. See the Exposed Pad PCB Design section for

more information.

A_IN = analog input, A_OUT = analog output, D_IN = digital input, D_IO = digital input/output, D_OUT = digital output, PWR = power.

ADAU1361BCPZ-R7 Arkusz danych(PDF) 16 Page - Analog Devices

ADAU1361BCPZ-R7 Arkusz danych(HTML) 16 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

Arkusz danych Pobierz

Link URL