LM2467 datasheet(24/43 Pages) NSC

24 / 43 page

OSD Generator Operation (Continued)

Microcontroller Interface

The microcontroller interfaces to the LM1236 preamp using

the I

2C compatible interface. The protocol of the interface

begins with a Start Pulse followed by a byte comprised of a

7-bit Slave Device Address and a Read/Write bit. Since the

first byte is composed of both the address and the read/write

bit, the address of the LM1236 for writing is 0xBA

(10111010b)

and

the

address

for

reading

0xBB

(10111011b). The development software provided by Na-

tional Semiconductor will automatically take care of the dif-

ference between the read and write addresses if the target

address under the communications tab is set to 0xBA. Fig-

ures 23, 24 show a write and read sequence on the I

compatible interface.

WRITE SEQUENCE

The write sequence begins with a start condition, which

consists of the master pulling SDA low while SCL is held

high. The Slave Device Write Address, 0xBA, is sent next.

Each byte that is sent is followed by an acknowledge bit.

When SCL is high, the master will release the SDA line. The

slave must pull SDA low to acknowledge. The register to be

written to is next sent in two bytes, the least significant byte

being sent first. The master can then send the data, which

consists of one or more bytes. Each data byte is followed by

an acknowledge bit. If more than one data byte is sent, the

data will increment to the next address location. See Figure

23.

READ SEQUENCE

Read sequences are comprised of two I2C compatible trans-

fer sequences: The first is a write sequence that only trans-

fers the two byte address to be accessed. The second is a

read sequence that starts at the address transferred in the

previous address only write access and increments to the

next address upon every data byte read. This is shown in

Figure 24. The write sequence consists of the Start Pulse,

the Slave Device Write Address (0xBA), and the Acknowl-

edge bit; the next byte is the least significant byte of the

address to be accessed, followed by its Acknowledge bit.

This is then followed by a byte containing the most signifi-

cant address byte, followed by its Acknowledge bit. Then a

Stop bit indicates the end of the address only write access.

Next the read data access will be performed beginning with

the Start Pulse, the Slave Device Read Address (0xBB), and

the Acknowledge bit. The next 8 bits will be the read data

driven out by the LM1236 preamp associated with the ad-

dress indicated by the two address bytes. Subsequent read

data bytes will correspond to the next increment address

locations. Data should only be read from the LM1236 when

both OSD windows and the Fade In/ Fade Out are disabled.

20075737

FIGURE 22. Bordering

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