TMS27C020 262144 BY 8-BIT UV ERASABLE

TMS27PC020 262144 BY 8-BIT

PROGRAMMABLE READ-ONLY MEMORIES

SMLS020C – NOVEMBER 1990 – REVISED SEPTEMBER 1997

9

POST OFFICE BOX 1443

(see Note 3)

PARAMETER

MIN

MAX

UNIT

tdis(G)

Output disable time from G

0

100

ns

ten(G)

Output enable time from G

150

ns

NOTE 3: For all switching characteristics the input pulse levels are 0.4 V to 2.4 V. Timing measurements are made at 2 V for logic high and

0.8 V for logic low (See Figure 2).

timing requirements for programming

MIN

TYP

MAX

UNIT

tw(PGM)

Pulse duration, program

SNAP! Pulse programming algorithm

95

100

105

µs

tsu(A)

Setup time, address

2

µs

tsu(E)

Setup time, E

2

µs

tsu(G)

Setup time, G

2

µs

tsu(D)

Setup time, data

2

µs

tsu(VPP)

Setup time, VPP

2

µs

tsu(VCC)

Setup time, VCC

2

µs

th(A)

Hold time, address

0

µs

th(D)

Hold time, data

2

µs