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SAFC161PI Arkusz danych(PDF) 46 Page - Infineon Technologies AG |
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SAFC161PI Arkusz danych(HTML) 46 Page - Infineon Technologies AG |
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46 / 400 page ![]() &3, 0HPRU\ 2UJDQL]DWLRQ User’s Manual 3-10 1999-08 XRAM Access via External Masters When bit XPER-SHARE in register SYSCON is set the on-chip XRAM of the C161PI can be accessed by an external master during hold mode via the C161PI’s bus interface. These external accesses must use the same configuration as internally programmed, i.e. demultiplexed bus, 4 TCL minimum access cycle time. No waitstates are required. Note: The configuration in register SYSCON cannot be changed after the execution of the EINIT instruction. |
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