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LAN7430 Arkusz danych(PDF) 36 Page - Microchip Technology

Numer części LAN7430
Szczegółowy opis  Low Power PCIe to Gigabit Ethernet Controller with Integrated Ethernet MAC / PHY
PDF  77 Pages
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Producent  MICROCHIP [Microchip Technology]
Strona internetowa  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN7430 Arkusz danych(HTML) 36 Page - Microchip Technology

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• PDelay_Resp_Follow_Up
• Announce
• Signaling
• Management
The first seven message types are used for clock synchronization. Using these messages, the protocol software may
calculate the offset and network delay between timestamps, adjusting the slave clock frequency as needed. Refer to
the IEEE 1588-2008 protocol for message definitions and proper usage.
A PTP domain is segmented into PTP sub-domains, which are then segmented into PTP communication paths. Within
each PTP communication path there is a maximum of one master clock, which is the source of time for each slave clock.
The determination of which clock is the master and which clock(s) is(are) the slave(s) is not fixed, but determined by
the IEEE 1588-2008 protocol. Similarly, each PTP sub-domain may have only one master clock, referred to as the
Grand Master Clock.
PTP communication paths are conceptually equivalent to Ethernet collision domains and may contain devices which
extend the network. However, unlike Ethernet collision domains, the PTP communication path does not stop at a net-
work switch, bridge, or router. This leads to a loss of precision when the network switch/bridge/router introduces a vari-
able delay. Boundary clocks are defined which conceptually bypass the switch/bridge/router (either physically or via
device integration). Essentially, a boundary clock acts as a slave to an upstream master, and as a master to a down
stream slave. A boundary clock may contain multiple ports, but a maximum of one slave port is permitted.
Although boundary clocks solve the issue of the variable delay influencing the synchronization accuracy, they add clock
jitter as each boundary clock tracks the clock of its upstream master. Another approach that is supported is the concept
of transparent clocks. These devices measure the delay they have added when forwarding a message (the residence
time) and report this additional delay either in the forwarded message (one-step) or in a subsequent message (two-
step).
The PTP relies on the knowledge of the path delays between the master and the slave. With this information, and the
knowledge of when the master has sent the packet, a slave can calculate its clock offset from the master and make
appropriate adjustments. There are two methods of obtaining the network path delay. Using the end-to-end method,
packets are exchanged between the slave and the master. Any intermediate variable bridge or switch delays are com-
pensated by the transparent clock method described above. Using the round trip time and accounting for the residence
time reported, the slave can calculate the mean delay from the master. Each slave sends and receives its own mes-
sages and calculates its own delay. While the end-to-end method is the simplest, it does add burden on the master since
the master must process packets from each slave in the system. This is amplified when boundary clocks are replaced
by transparent clocks. Also, the end-to-end delays must be recalculated if there is a change in the network topology.
Using the peer-to-peer method, packets are exchanged only between adjacent master, slaves and transparent clocks.
Each peer pair calculates the receive path delay. As time synchronization packets are forwarded between the master
and the slave, the transparent clock adds the pre-measured receive path delay into the residence time. The final
receiver adds its receive path delay. Using the peer-to-peer method, the full path delay is accounted for without the mas-
ter having to service each slave. The peer-to-peer method better supports network topology changes since each path
delay is kept up-to-date regardless of the port status.
The PTP implementation consists of the following major function blocks:
• PTP Timestamp
This block provides time stamping and packet modification functions.
• 1588 Clock
This block provides a tunable clock that is used as the time source for all PTP timestamp related functions.
• 1588 Clock Events
This block provides clock comparison-based interrupt generation and timestamp related GPIO event generation.
• 1588 GPIOs
This block provides for time stamping GPIO input events and for outputting clock comparison-based interrupt sta-
tus.
• 1588 Interrupts
This block provides interrupt generation, masking and status.
• 1588 Registers
This block provides contains all configuration, control and status registers.



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