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AT25SL321 Arkusz danych(PDF) 21 Page - Dialog Semiconductor

Numer części AT25SL321
Szczegółowy opis  32-Mbit, 1.7 V Minimum SPI Serial Flash Memory with Dual I/O, Quad I/O and QPI Support
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AT25SL321
DS-25SL321–112H–2020-10
8.4
Write Disable (04h)
The Write Disable instruction is used to reset the Write Enable Latch (WEL) bit in the Status Register. To enter the
Write Disable instruction, assert CS low prior to driving the instruction 04h onto the SI on the rising edge of SCK,
and then driving CS high to terminate the operation. The WEL bit is automatically reset write- disable status of “0”
after Power-up and upon completion of the every Program, Erase and Write Status Register instructions.
Figure 8-3. Write Disable Instruction for SPI Mode (left) and QPI Mode (right)



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