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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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AD9161BBCZ Arkusz danych(PDF) 14 Page - Analog Devices |
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AD9161BBCZ Arkusz danych(HTML) 14 Page - Analog Devices |
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14 / 144 page  AD9161/AD9162 Data Sheet Rev. D | Page 14 of 144 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 VNEG_N1P2 VDD25_DAC VNEG_N1P2 VNEG_N1P2 VDD25_DAC VDD25_DAC OUTPUT– OUTPUT+ VDD25_DAC VDD25_DAC VNEG_N1P2 VNEG_N1P2 VSS VSS ISET A VSS VSS VDD25_DAC VNEG_N1P2 VNEG_N1P2 VDD25_DAC VDD25_DAC VDD25_DAC VDD25_DAC VNEG_N1P2 VNEG_N1P2 VDD25_DAC VDD12A VDD12A VREF B CLK+ VSS VDD25_DAC VNEG_N1P2 VNEG_N1P2 VDD25_DAC VDD25_DAC VNEG_N1P2 VNEG_N1P2 VDD25_DAC VBG_NEG VNEG_N1P2 VDD25_DAC C CLK– VSS VSS VSS VSS VSS D VSS VSS VSS VSS VSS VDD12_CLK E VDD12_CLK VDD12_CLK VDD12_CLK VSS VSS VSS VSS VSS VDD12_CLK VDD12_CLK VDD12_CLK F IRQ VSS VSS VDD12_DCD/ DLL VDD12_DCD/ DLL VSS VDD12_ DCD/DLL VDD12_ DCD/DLL VSS VSS CS G VSS TX_ENABLE VSS VSS VSS VSS VSS VSS VSS SDO VSS H SERDIN7+ VDD_1P2 RESET VSS VSS VSS VSS VSS SCLK VDD_1P2 SERDIN0+ J SERDIN7– VDD_1P2 IOVDD DVDD DVDD DVDD DVDD DVDD SDIO VDD_1P2 SERDIN0– K VSS VSS DVDD_1P2 DVDD_1P2 VSS VSS L SERDIN6+ VDD_1P2 VTT_1P2 VTT_1P2 VDD_1P2 SERDIN1+ M SERDIN6– VDD_1P2 SYSREF+ SYSREF– VSS VSS PLL_CLK_ VDD12 PLL_LDO_ VDD12 VSS VDD_1P2 SERDIN1– N VSS SYNC_ VDD_3P3 VDD_1P2 VDD_1P2 DNC VDD_1P2 VDD_1P2 PLL_LDO_ BYPASS VDD_1P2 VDD_1P2 DNC VDD_1P2 VDD_1P2 SYNC_ VDD_3P3 VSS P BIAS_VDD_ 1P2 VSS SERDIN5+ SERDIN5– VSS SERDIN4+ SERDIN4– VSS SERDIN3– SERDIN3+ VSS SERDIN2– SERDIN2+ VSS BIAS_ VDD_1P2 R A B C D E F G H J K L M N P R SYNCOUT– SYNCOUT+ DNC = DO NOT CONNECT. –1.2V ANALOG SUPPLY V 1.2V DAC CLK SUPPLY V DAC RF SIGNALS REFERENCE 2.5V ANALOG SUPPLY V SERDES INPUT SYSREF±/SYNCOUT± 1.2V DAC SUPPLY V SERDES 3.3V VCO SUPPLY V CMOS I/O IOVDD GROUND SERDES 1.2V SUPPLY V Figure 4. 165-Ball CSP_BGA Pin Configuration Table 13. 165-Ball CSP_BGA Pin Function Descriptions Pin No. Mnemonic Description A1, A3, A4, A11, A12, B4, B5, B10, B11, C5, C6, C9, C10, C14 VNEG_N1P2 −1.2 V Analog Supply Voltage. A2, A5, A6, A9, A10, B3, B6, B7, B8, B9, B12, C4, C7, C8, C11, C15 VDD25_DAC 2.5 V Analog Supply Voltage. A7 OUTPUT− DAC Negative Current Output. A8 OUTPUT+ DAC Positive Current Output. A13, A14, B1, B2, C2, D2, D3, D13, D14, D15, E1, E2, E3, E13, E14, F6, F7, F8, F9, F10, G2, G3, G8, G13, G14, H1, H3, H6, H7, H8, H9, H10, H13, H15, J6, J7, J8, J9, J10, L1, L2, L14, L15, N6, N7, N10, P1, P15, R2, R5, R8, R11, R14 VSS Supply Return. Connect these pins to ground. A15 ISET Reference Current. Connect this pin to VNEG_N1P2 with a 9.6 kΩ resistor. B13, B14 VDD12A 1.2 V Analog Supply Voltage. B15 VREF 1.2 V Reference Input/Output. Connect this pin to VSS with a 1 µF capacitor. C1, D1 CLK+, CLK− Positive and Negative DAC Clock Inputs. C12 VBG_NEG −1.2 V Reference. Connect this pin to VNEG_N1P2 with a 0.1 µF capacitor. E15, F1, F2, F3, F13, F14, F15 VDD12_CLK 1.2 V Clock Supply Voltage. G1 IRQ Interrupt Request Output (Active Low, Open Drain). |
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