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ADE1201 Arkusz danych(PDF) 23 Page - Analog Devices

Numer części ADE1201
Szczegółowy opis  Single Channel, Configurable, Isolated Digital Input
PDF  40 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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ADE1201 Arkusz danych(HTML) 23 Page - Analog Devices

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Data Sheet
ADE1201
Rev. 0 | Page 23 of 40
GATE DRIVE
The GATE pin is used to drive an external high voltage
enhancement mode FET, Q1. After power-up, the GATE pin is
biased at VGATENOM to allow Q1 to conduct the constant current
while protecting the LOAD1 pin, as shown in Figure 34. One
10 Ω, external, gate current limiting resistor (R13), and a 0.1 µF
gate capacitor (C5) are required for stability. Table 1 shows the
nominal VGATENOM voltage (see Figure 34).
During a pulsed current, VGATENOM is regulated to reduce the
voltage on the LOAD1 pin to minimize on-chip power
consumption.
When the external FET is conducting, the corresponding
LOAD1 pin (VGS) is at 0.6 V.
After a pulsed current period, the GATE voltage is regulated
back to VGATENOM. The ADE1201 is compatible with FETs with a
maximum VGS of 6 V.
Q1
E5
FB
GATE
IN1
R13
LOAD1
10Ω
C3
0.1µF
C5
0.1µF
V2
ADE1201
GNDF
MOV
275VAC/350VDC
D1
+
–
~
~
R4
E3
10Ω
FB
R5
E4
10Ω
FB
C2
10nF
VGS
R12
1.1kΩ
1nF
C6
≤300V
R1
95.3kΩ
R2
95.3kΩ
R3
95.3kΩ
Figure 34. FET Gate Control



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