WAKE-UP TIMER IC

PIN-SELECTABLE WAKE-UP TIMER IC

S-35720 Series

9

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INT Pin Interrupt Signal Output

The RST

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pin of the S-35720 Series has a built-in chattering elimination circuit. Therefore, after the RST

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pin changes

from "L" to "H", a delay occurs until the timer starts the count-up action. Furthermore, an internal circuit delay occurs until

the first interrupt signal occurs. Since the maximum delay time after the RST

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pin changes from "L" to "H" is

approximately 700 ms, the timing for the occurrence of the first interrupt signal is delayed.

After the RST

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pin changes from "L" to "H", the S-35720 Series takes the values set to the SET0 pin and the SET1 pin. As

a result, even if the SET0 pin and the SET1 pin settings are changed during timer count-up action, the interrupt time does

not change.

1. One-shot loop time-out

One-shot loop time-out is a type to output the "L" pulse interrupt signal repeatedly from the INT pin.

After the RST

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pin changes from "L" to "H", the timer starts the operation. Then, the INT pin outputs "L" pulse when

timer automatically, and restarts a count-up action.

If "L" is input to the RST

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timer is reset.

*1. 4 types of interrupt time can be selected depending on the SET0 pin and the SET1 pin settings.

Remark The above description is the example of S-35720C01I (Nch open-drain output).

In S-35720C02I (CMOS output), the INT pin output is the inverse logic of S-35720C01I.

After the reset is released, INT pin outputs "L" pulse periodically

Internal circuit delay

Reset

Reset

One-shot loop time-out One-shot loop time-out

One-shot loop time-out

7.8 ms

7.8 ms

7.8 ms

SET0 and SET1 pin settings

take-in timing

Internal circuit delay

SET0 and SET1 pin settings

take-in timing

RST

INT

Figure 7 Output Timing of One-shot Loop Time-out (S-35720C01I / Nch Open-drain Output)

After the reset is released, INT pin outputs "H" pulse periodically

Internal circuit delay

Reset

Reset

One-shot loop time-out One-shot loop time-out

One-shot loop time-out

125 ms

125 ms

125 ms

SET0 and SET1 pin settings

take-in timing

Internal circuit delay

SET0 and SET1 pin settings

take-in timing

RST

INT

Figure 8 Output Timing of One-shot Loop Time-out (S-35720C02I / CMOS Output)