WAKE-UP TIMER IC

PIN-SELECTABLE WAKE-UP TIMER IC

S-35720 Series

12



Chattering Elimination of RST

_________

Pin

The RST

_______

pin has a built-in chattering elimination circuit, and the output logic is active "L".

Sampling is carried out 3 times at a clock period of 8 Hz and the RST

_______

pin input signal is verified. If all of the sampling

results are "L", the counter is reset, if all the results are "H", a count-up action is started.

The chattering elimination circuit can eliminate the pulse width of 2 periods (approximately 0.25 seconds) of the clock

(8 Hz). To determine the RST

_______

pin "L" or "H" input, maintain the RST

_______

pin "L" or "H" input during the period longer than

3.5 periods (0.438 seconds) of clock (8 Hz). This is because, for example, if the RST

_______

pin "L" or "H" input is 0.375

seconds, the input may not be determined depending on the clock timing.

<1>

<2>

<3>

<1>

<2>

<1>

<2>

<1>

<2>

<3>

<3>

0.375 seconds

Uncertain

Uncertain

Chattering elimination

example

Counter reset

Count-up action starts

RST pin input signal

Clock (8Hz)

Reset signal after

chattering elimination

"L" determination

"H" determination

Figure 12 Example: Timing Chart of Chattering Elimination