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MPFS250T Arkusz danych(PDF) 16 Page - Microchip Technology |
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MPFS250T Arkusz danych(HTML) 16 Page - Microchip Technology |
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16 / 128 page ![]() Condition (V) AC (VIN) Undershoot Duration as % at TJ = 100 °C –0.85 100 –0.9 100 –0.95 100 –1 100 –1.05 100 –1.1 100 –1.15 100 –1.2 100 –1.25 69 –1.3 45 5.2.2.1 Power Supply Ramp Times The following table lists the allowable power-up ramp times. Times shown correspond to the ramp of the supply from 0 V to the minimum recommended voltage as specified in the section Recommended Operating Conditions. All supplies must rise and fall monotonically. Table 12 • Power Supply Ramp Times Unit Max Min Symbol Parameter ms 50 0.2 VDD FPGA core supply ms 50 0.2 VDDA Transceiver core supply ms 50 0.2 VDD18 Must connect to 1.8 V supply ms 50 0.2 VDD25 Must connect to 2.5 V supply ms 50 0.2 VDDA25 Must connect to 2.5 V supply ms 50 0.2 VDDI[0,1,6,7] HSIO bank I/O power supplies ms 50 0.2 VDDI[2,4,5] GPIO bank I/O power supplies ms 50 0.2 VDDI3 Bank 3 dedicated I/O buffers (GPIO) ms 50 0.2 VDDAUX[2,4,5] GPIO bank auxiliary power supplies 12 Microsemi Proprietary and Confidential. DS0147 Revision 1.0 DC Characteristics |
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