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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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FT801Q-R Arkusz danych(PDF) 26 Page - Bridgetek Pte Ltd. |
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FT801Q-R Arkusz danych(HTML) 26 Page - Bridgetek Pte Ltd. |
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26 / 44 page  Copyright © Bridgetek Pte Ltd 26 FT801 Embedded Video Engine Datasheet Version 1.3 Document Reference No.: BRT_000001 Clearance No.: BRT#003 Figure 4-8 1.2V regulator 4.8.3 Power Modes When supply to VCCIO and VCC is applied, internal 1.2V regulator is powered by VCC. An internal POR pulse will be generated during the regulator power up until it is stable. After the initial power up, the FT801 will stay in STANDBY state. When needed, host can set FT801 to ACTIVE state by performing a dummy read to address 0. The graphics engine, the audio engine and the touch engine are only functional in ACTIVE state. To save power host can send command to put FT801 into any of the low power mode: STANDBY, SLEEP and POWERDOWN. In addition, host is allowed to put FT801 in POWERDOWN mode by drive PD_N pin to low, regardless what current state it is in. Refer to Figure 4-9 for the power state transitions. VCC PD_N VCC1V2 VCC GND GND GND VCCIO C R Cin 10uF 100nF 1.2V GND Ccomp 4.7uF 47k FT801 |
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