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Return Loss

Insertion Loss

Isolation

Bias Voltage & Current

TTL/CMOS Control Voltages

Vdd Range = +5.0 Vdc ± 10%

Vdd

(Vdc)

Idd (Typ.)

(mA)

Idd (Max.)

(mA)

+5.0

2.7

5.0

State

Bias Condition

Low

0 to +0.8 Vdc @ 5uA Typ.

High

+2.0 to +5.0 Vdc @ 70 uA Typ.

Truth Table

NOTE: DC Blocking capacitors are required at ports RFC

and RF1, 2, 3, 4.

Control Input

Signal Path State

A

B

RFC to:

LOW

LOW

RF1

HIGH

LOW

RF2

LOW

HIGH

RF3

HIGH

HIGH

RF4

GaAs MMIC SP4T NON-REFLECTIVE

SWITCH, DC - 4.0 GHz

v01.0905

-5

-4

-3

-2

-1

0

012345

6

+25 C

+85 C

-40 C

FREQUENCY (GHz)

-70

-60

-50

-40

-30

-20

-10

0

012345

6

RF1

RF2

RF3

RF4

FREQUENCY (GHz)

-35

-30

-25

-20

-15

-10

-5

0

012345

6

RFC

RF1-4 ON

RF1-4 OFF

FREQUENCY (GHz)