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T48C862-R3 Arkusz danych(PDF) 93 Page - ATMEL Corporation |
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T48C862-R3 Arkusz danych(HTML) 93 Page - ATMEL Corporation |
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93 / 107 page ![]() 93 T48C862-R3 4554A–4BMCU–02/03 Write Control Bytes A -> acknowledge; HB: high byte; LB: low byte; R: row address Read Operations The EEPROM allows byte-, word- and current address read operations. The read oper- ations are initiated in the same way as write operations. Every read access is initiated by sending the START condition followed by the control byte which contains the address and the read mode. When the device has received a read command, it returns an acknowledge, loads the addressed word into the read/write buffer and sends the selected data byte to the master. The master has to acknowledge the received byte if it wants to proceed the read operation. If two bytes are read out from the buffer the device increments respectively decrements the word address automatically and loads the buffer with the next word. The read mode bits determines if the low or high byte is read first from the buffer and if the word address is incremented or decremented for the next read access. If the memory address limit is reached, the data word address will roll over and the sequential read will continue. The master can terminate the read operation after every byte by not responding with an acknowledge (N) and by issuing a stop condition. Read One Data Byte Read Two Data Bytes Read n Data Bytes Read Control Bytes MSB LSB Write low byte first A4 A3 A2 A1 A0 C1 C0 R/NW Row address 0 1 0 Byte order LB(R) HB(R) MSB LSB Write high byte first A4 A3 A2 A1 A0 C1 C0 R/NW Row address 1 0 0 Byte order HB(R) LB(R) Start Control byte A Data byte 1 N Stop Start Control byte A Data byte 1 A Data byte 2 N Stop Start Control byte A Data byte 1 A Data byte 2 A - - - Data byte n N Stop MSB LSB Read low byte first, address increment A4 A3 A2 A1 A0 C1 C0 R/NW Row address 0 1 1 Byte order LB(R) HB(R) LB(R+1) HB(R+1) - - - LB(R+n) HB(R+n) MSB LSB |
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