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WM8591GEDS/V Arkusz danych(PDF) 34 Page - Wolfson Microelectronics plc

Numer części WM8591GEDS/V
Szczegółowy opis  24-bit, 192kHz Stereo CODEC
PDF  51 Pages
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Producent  WOLFSON [Wolfson Microelectronics plc]
Strona internetowa  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8591GEDS/V Arkusz danych(HTML) 34 Page - Wolfson Microelectronics plc

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WM8591
Production Data
w
PD Rev 4.0 December 2005
34
Figure 22 ALC Operation
The gain control circuit is enabled by setting the LCMODE control bit. The user can select between
Limiter mode and three different ALC modes using the LCSEL control bits.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R17 (11h)
0010001
ALC Control 2
8
LCMODE
1
ALC/Limiter Select
0 = ALC Mode
1 = Limiter Mode
R16 (10h)
0010000
ALC Control 1
8:7
LCSEL
11
LC Function Select
00 = Disabled
01 = Right channel only
10 = Left channel only
11 = Stereo
Both the ALC and Limiter functions can operate in stereo or single channel modes. In stereo mode,
the ALC/Limiter operates on both PGAs. In single channel mode, only one PGA is controlled by the
ALC/Limiter mechanism, while the other channel runs independently with its PGA gain set through
the control register.
When enabled, the threshold for the limiter or target level for the ALC is programmed using the LCT
control bits. This allows the threshold/target level to be programmed between 0dB and -22.5dB in
1.5dB steps. Note that for the ALC, target levels of 0dB and -1.5dB give a threshold of -3dB. This is
because the ALC can give erroneous operation if the target level is set too high.
When disabled, the last gain level programmed by the ALC/Limiter will remain stored in the input
PGAs. The desired fixed gain level must then be programmed manually via registers R14 and R15.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R16 (10h)
0010000
ALC Control 1
3:0
LCT[3:0]
1110
(-1.5dB)
Limiter Threshold/ALC Target Level in
1.5dB Steps:
0000: -22.5dB FS
0001: -21dB FS
…
1101: -3dB FS
1110: -1.5dB FS
1111: 0dB FS
hold
time
decay
time
attack
time
input
signal
signal
after
ALC
PGA
gain
ALC
target
level



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