© Semiconductor Components Industries, LLC, 2005

July, 2005 − Rev. 0

1

Publication Order Number:

OPAMP1EVB/D

OPAMP1EVB

Op Amp Evaluation

Board Manual

SOT23, SC70, and

SOIC8 Package

Description

This document describes the SOT23, SC70, and SOIC8

package Op Amp evaluation board. It should be used in

conjunction with the appropriate data sheet which contains

full technical details on the device specification and

operation. This evaluation board is offered as a convenience

for the customers interested in performing their own

engineering characterization and performance assessment.

The evaluation board provides a 50

W controlled impedance

environment. The evaluation board is designed to facilitate

a quick evaluation of the device. The default populated

evaluation board will have a gain of two.

This evaluation board manual contains:

Evaluation Board

Evaluation Board

Evaluation Board

Board Lay−up

The SOT23, SC70, and SOIC8 evaluation boards are

implemented in two layers (Figure 1, Evaluation Board

Lay−up). The first layer is the 1.0 oz copper ground plane,

where a portion of the ground plane is cut out to mount the

device. The FR4 dielectric material is placed between the

first and second layer. The second layer contains the rest of

the components and primary signal traces.

Cu = 1 Oz, 0.0014

Top Silkscreen

Top Soldermask

Top Plating

Top Metal

Bottom Metal

01

02

Bottom Silkscreen

Bottom Soldermask

Bottom Plating

Tw = 0.045, Zo = 50

W, Cu = 1 Oz, 0.0014

Adjust

Figure 1. Evaluation Board Lay−up

Board Design

The evaluation board was designed for non−inverting op

amp configuration (Figure 2).

The

input

contains

termination resistor R3 (usually 50

Ω). The input can also be

monitored through J1 when R1 and R2 are populated. The

evaluation board has versatile loading options for the op

amp through C9, R10, and R11 depending on the user’s

preference it can be configured as capacitive load, series

resistance load, parallel resistance load, etc.

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