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OPAMP1EVB Arkusz danych(PDF) 2 Page - ON Semiconductor |
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OPAMP1EVB Arkusz danych(HTML) 2 Page - ON Semiconductor |
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2 / 8 page ![]() OPAMP1EVB http://onsemi.com 2 VCC OA Banana Jack J5 D6 C7 C6 R7 C5 VCC GND Banana Jack J7 VEE EN JMP1 C3 R5 C2 C1 D7 VEE OA Banana Jack J6 BNC Connector Scope J1 R1 R2 BNC Connector IN J2 R3 + − VEE VCC R6 R4 C9 R10 R11 BNC Connector Out J3 Figure 2. Evaluation Board Schematic Ferrite Bead L2 Ferrite Bead L1 • L1, L2, C1, C2, C3, C5, C6, C7, D6, D7, R5, and R7 are for power supply noise suppression • R3 is for input matching of 50 W trace • R1 and R2 are for monitoring the input signal • R4 and R6 are for feedback resistors • C9, R10, and R11 are for different loading configuration of the op amp • If enable pin is available, the Jumper 1 can be used to enable or disable the device |
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