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HCS08 Arkusz danych(PDF) 81 Page - Motorola, Inc |
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HCS08 Arkusz danych(HTML) 81 Page - Motorola, Inc |
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81 / 290 page ![]() Data Sheet — MC9S08GB60/D V1.5 MOTOROLA 81 MC9S08GB/GT Section 6 Internal Clock Generator (ICG) Module The MC9S08GB/GT microcontroller provides one internal clock generation (ICG) module to create the system bus frequency. All functions described in this section are available on the MC9S08GB/GT microcontroller. The EXTAL and XTAL pins share port G bits 2 and 1, respectively. Analog supply lines VDDA and VSSA are internally derived from the MCU’s VDD and VSS pins. Electrical parametric data for the ICG may be found in the Electrical Characteristics appendix. Figure 6-1 System Clock Distribution Diagram NOTE: Motorola recommends that FLASH location $FFBE be reserved to store a nonvolatile version of ICGTRM. This will allow debugger and programmer vendors to perform a manual trim operation and store the resultant ICGTRM value for users to access at a later time. TPM1 TPM2 IIC SCI1 SCI2 SPI BDC CPU ATD RAM FLASH ICG ICGOUT ÷2 FFE SYSTEM LOGIC BUSCLK ICGLCLK* ATD has min and max frequency requirements. See ATD section and FLASH has frequency requirements for program and erase operation. See Appendix A. Appendix A. CONTROL FIXED FREQ CLOCK (XCLK) ICGERCLK RTI * ICGLCLK is the alternate BDC clock source for the MC9S08GB/GT. |
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