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STP08DP05 Arkusz danych(PDF) 18 Page - STMicroelectronics |
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STP08DP05 Arkusz danych(HTML) 18 Page - STMicroelectronics |
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18 / 30 page ![]() Detection mode functionality STP08DP05 18/30 10 Detection mode functionality 10.1 Phase one: “entering in detection mode“ From the “Normal Mode” condition the device can switch to the “Error Mode“ by a logic sequence on the OE/DM2 and LE/DM1 pins as showed in the following table and diagram: After these five CLK cycles the device goes into the “Error Detection Mode“ and at the 6th rise front of CLK the SDI data are ready for the sampling. Table 10. Entering in detection truth table CLK 1°2°3°4° 5° OE/DM2 H L HHH LE/DM1 LLL H L Figure 16. Entering in detection timing diagram |
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