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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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ST7LITE49M Arkusz danych(PDF) 75 Page - STMicroelectronics |
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ST7LITE49M Arkusz danych(HTML) 75 Page - STMicroelectronics |
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75 / 188 page  ST7LITE49M I/O ports 75/188 10.6 Interrupts The external interrupt event generates an interrupt if the corresponding configuration is selected with DDR and OR registers and if the I bit in the CC register is cleared (RIM instruction). See application notes AN1045 software implementation of I2C bus master, and AN1048 - software LCD driver 10.7 Device-specific I/O port configuration The I/O port register configurations are summarised in Section 10.7.1: Standard ports and Section 10.7.2: Other ports. 10.7.1 Standard ports 10.7.2 Other ports Table 26. Description of interrupt events Interrupt Event Event flag Enable Control bit Exit from Wait Exit from Halt External interrupt on selected external event - DDRx ORx Yes Yes Table 27. PA5:0, PB7:0, PC7:4 and PC2:0 pins Mode DDR OR floating input 0 0 pull-up interrupt input 0 1 open drain output 1 0 push-pull output 1 1 Table 28. PA7:6 pins Mode DDR OR floating input 0 0 interrupt input 0 1 open drain output 1 0 push-pull output 1 1 |
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