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ST7LITE49M Arkusz danych(PDF) 87 Page - STMicroelectronics

Numer części ST7LITE49M
Szczegółowy opis  8-bit MCU with single voltage Flash memory data EEPROM, ADC, 8/12-bit timers, and I²C interface
PDF  188 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7LITE49M Arkusz danych(HTML) 87 Page - STMicroelectronics

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On-chip peripherals
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Figure 44.
Block diagram of output compare mode (single timer)
Input Capture mode
The 12-bit ATICR register is used to latch the value of the 12-bit free running upcounter
CNTR1 after a rising or falling edge is detected on the ATIC pin. When an Input Capture
occurs, the ICF bit is set and the ATICR register contains the value of the free running
upcounter. An IC interrupt is generated if the ICIE bit is set. The ICF bit is reset by reading
the ATICRH/ATICRL register when the ICF bit is set. The ATICR is a read only register and
always contains the free running upcounter value which corresponds to the most recent
Input Capture. Any further Input Capture is inhibited while the icf bit is set.
Figure 45.
Block diagram of Input Capture mode
DCRx
OUTPUT COMPARE CIRCUIT
COUNTER 1
(ATCSR)
CMPIE
PRELOAD DUTY CYCLE REG0/1/2/3
ACTIVE DUTY CYCLE REGx
CNTR1
TRAN1
(ATCSR2)
OVF
(ATCSR)
CMPFx (PWMxCSR)
CMP
REQUEST
INTERRUPT
ATCSR
CK0
CK1
ICIE
ICF
12-BIT AUTORELOAD REGISTER
12-BIT UPCOUNTER1
fCPU
ATIC
12-BIT INPUT CAPTURE REGISTER
IC INTERRUPT
REQUEST
ATR1
ATICR
CNTR1
(1 ms
fLTIMER
@ 8MHz)
timebase
OFF
32MHz



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