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PS200 Arkusz danych(PDF) 23 Page - Microchip Technology |
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PS200 Arkusz danych(HTML) 23 Page - Microchip Technology |
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23 / 36 page ![]() © 2005 Microchip Technology Inc. DS21891B-page 21 PS200 TABLE 5-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER AND BROWN-OUT DETECT REQUIREMENTS TABLE 5-5: PRECISION INTERNAL OSCILLATOR PARAMETERS Param No. Sym Characteristic Min Typ† Max Units Conditions 30 TMCL RESET Pulse Width (low) 2 11 — 18 — 24 μs ms VDD = 5V, -40°C to +85°C Extended temperature 32 TOST Oscillation Start-up Timer Period — 1024 TOSC —— TOSC = FOSC period 33* TPWRT Power-up Timer Period (4 x TWDT) 28* TBD 64 TBD 132* TBD ms ms VDD = 5V, -40°C to +85°C 34 TIOZ I/O High-Impedance from RESET Low or Watchdog Timer Reset —— 2.0 μs BVDD Brown-out Detect Voltage 2.025 2.175 V BVHY Brown-out Hysteresis 25 mV 35 TBOR Brown-out Detect Pulse Width 100* — — μsVDD ≤ BVDD (D005) Legend: TBD = To Be Determined * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Param No. Sym Characteristic Freq Tolerance Min Typ† Max Units Conditions F10 FOSC Internal Calibrated INTOSC Frequency(1) ±1% — 8.00 TBD MHz VDD and Temperature (TBD) ±2% — 8.00 TBD MHz 2.5V ≤ VDD ≤ 5.5V 0 °C ≤ TA ≤ +85°C ±5% — 8.00 TBD MHz 2.0V ≤ VDD ≤ 5.5V -40 °C ≤ TA ≤ +85°C (Ind.) -40 °C ≤ TA ≤ +125°C (Ext.) F14 TIOSCST Oscillator Wake-up from Sleep Start-up Time* —— TBD TBD μsVDD = 2.0V, -40°C to +85°C —— TBD TBD μsVDD = 3.0V, -40°C to +85°C —— TBD TBD μsVDD = 5.0V, -40°C to +85°C Legend: TBD = To Be Determined † Data in “Typ” column is at 5.0V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible. 0.1 μF and .01 μF values in parallel are recommended. |
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