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SSM2602CPZ-R21 Arkusz danych(PDF) 13 Page - Analog Devices

Numer części SSM2602CPZ-R21
Szczegółowy opis  Low Power Audio Codec
PDF  28 Pages
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SSM2602CPZ-R21 Arkusz danych(HTML) 13 Page - Analog Devices

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Preliminary Technical Data
SSM2602
Rev. PrB | Page 13 of 28
SOFTWARE CONTROL INTERFACE
The software control interface can be operated with a 3-wire (SPI)
or 2-wire (I2C) interface. Selection of the interface format is
achieved by setting the state of the MODE pin.
Table 8. Selecting the Interface Format
MODE Pin Setting
Interface
0
2-wire (I2C) interface
1
3-wire (SPI) interface
In 3-wire (SPI) mode, SDIN is used for the program data, SCLK
is used to clock in the program data, and CSB is used to latch in
the program data. In 2-wire (I2C) mode, SDIN is used for serial
data, SCLK is used for the serial clock, and the state of the CSB
pin allows the user to select one of two addresses (see Table 9).
Table 9. Selecting the Address
CSB Pin Setting
Address
0
0011010
1
0011011
B15
B14
CSB
CCLK
SDIN
B0
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
NOTES
1. B15 TO B9 ARE REGISTER MAP ADDRESS.
2. B8 TO B0 ARE REGISTER DATA.
Figure 19. SPI Serial Interface
P
9
8
1 – 7
9
8
1 – 7
9
8
1 – 7
S
SDATA
SCLOCK
START
ADDR
R/W
ACK
ACK
SUBADDRESS
ACK
STOP
DATA
Figure 20. SSM2602 2-Wire I2C Generalized Clocking Diagram
WRITE
SEQUENCE
READ
SEQUENCE
SA1
A7
A0
A(S)
A(S)
S
B15
B9
0
01
0P
0
...
A1
A7
A0
A(S)
...
B0
B8
B7
A(M)
A(M)
...
B0
B7
P
...
...
...
DEVICE
ADDRESS
DEVICE
ADDRESS
REGISTER
ADDRESS
SA1
A7
A0
A(S)
A(S)
A(S)
B15
B9
B8
0
...
...
DEVICE
ADDRESS
REGISTER
ADDRESS
REGISTER
DATA
(SLAVE DRIVE)
REGISTER
DATA
S/P = START/STOP BIT.
A0 = I2C R/W BIT.
A(S) = ACKNOWLEGE BY SLAVE.
A(M) = ACKNOWLEGE BY MASTER.
A(M) = ACKNOWLEGE BY MASTER.
Figure 21. SSM2602 I2C Write and Read Sequences



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