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DSP56300 Arkusz danych(PDF) 83 Page - Freescale Semiconductor, Inc

Numer części DSP56300
Szczegółowy opis  Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
PDF  108 Pages
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Producent  FREESCALE [Freescale Semiconductor, Inc]
Strona internetowa  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

DSP56300 Arkusz danych(HTML) 83 Page - Freescale Semiconductor, Inc

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Extended Algorithm Program Listing
Viterbi Decoder Implementation
B-5
;*******************viterbi add, compare, select butterfly macro***
;
FUNCTION: Update path metrics/paths for the Viterbi algorithm by
;
doing an add,compare,select update for state pairs.
;
INPUTS:
;
r2 should point to the beginning of the branch metric table
;
r5 should point to the latest path metric for state 0
;
r4 should point to the storage location for updated state 0
;
n5 should offset addresses by NUMSTATES/2
;
OUTPUTS:
;
Updated path metrics/paths stored in XY memory
;
REGISTERS USED:
;
a,b,y01,r2,r4,r5,n5 r2 unchanged (modulo req'd)
;
Registers:
;
r5, pointer to the path metric/path table, arranged as
;
x: path metric, y: path,states ordered assuming
;
bits shift right to left.
;
r4, pointer to the output path metric/path table
;
r0, pointer to the branch metric table, arranged
;
as x:C, y:D, CD,CD,CD, etc.
;
;
SA------NSA
;
\
C /
;
D \
/
;
\/
;
/\
;
D /
\
;
/
\
;
SB------NSB
;
C
;*****************************************************************
;
ACS
macro
;
;
move
#BRY,r2
;r2 points to branch metrics
move
l:(r2)+,y
;get first branch metric
move
l:(r5)+n5,a
;load 1st metric/path pair
;
do
#NoAcs,_P_NextStage
;update each state
add
y0,a
l:(r5)-n5,b
;sum pt,br met,get next pair
add
y1,b
;update metric
max
a,b
l:(r5)+n5,a
;pick max, reload 1st pair
vsl
b,0,l:(r4)+
;save surivior, end top half
add
y1,a
l:(r5)-n5,b
;sum pt,br,reload next pair
add
y0,b
(r5)+
;sum again,inc pt mt read ptr
max
a,b
l:(r5)+n5,a
;pick max, load next pair
move
l:(r2)+,y
;load next branch metrics
vsl
b,1,l:(r4)+
;write survivor,end 2nd half
_P_NextStage
nop
;needed to separate do loop ends
endm
Example B-1
Extended Algorithm Program Listing (Continued)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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