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Introduction

Viterbi Decoder Implementation

1-3

1.1

INTRODUCTION

TodayÕs communication systems typically make considerable use of signal processing to

improve their performance. Two common functions that use signal processing to

improve performance are channel equalization and error correction coding. For

equalization, maximum likelihood sequence estimation is among the most popular

schemes; for error correction, convolutional coding with Viterbi decoding is a method of

choice. Both communication functions make use of the Viterbi algorithm to accomplish

their task. To simplify the explanations presented here, the focus is on using the

algorithm for error correction.

This application report is written with the intent of instructing the reader who, with a set

of convolutional code polynomials, can generate the assembly code needed to

implement a Viterbi decoder on the DSP56300 and DSP56600 families of digital signal

processors (DSPs).

The DSP56300 and DSP56600 families of DSPs are designed to implement

communication functions. Because the Viterbi algorithm occupies such a prominent

position in many communications systems, these processor families have a special

instruction, Viterbi shift left (VSL). This instruction is designed to improve the

performance of the processor when doing Viterbi algorithm operations. One goal of this

application note is to explain the use of the VSL instruction when implementing the

Viterbi algorithm.

1.2

VITERBI ALGORITHM

Communication applications that use convolutional coding or sequence estimation often

use the Viterbi algorithm to efficiently process the received data. These applications

occur so often that the DSP56300 and DSP56600 families have a special instruction to

enhance the algorithmÕs implementation. This application note begins by introducing

the Viterbi algorithm, then proceeds step by step through an implementation of that

algorithm for a specific error correction example. In addition, use of the new VSL

instruction is explained for obtaining efficient coding for applications requiring the

Viterbi algorithm.

Freescale Semiconductor, Inc.

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DSP56300 Arkusz danych(PDF) 13 Page - Freescale Semiconductor, Inc