HT49CV3 datasheet(21/44 Pages) HOLTEK

21 / 44 page

HT49RV3/HT49CV3

Rev. 1.30

March 20, 2007

Master mode: when data has been transferred

set TRF

Slave mode: when a SCK (and SCS dependent

on CSEN) is received, data in TXRX buffer is

shifted-out and data on SDI is shifted-in

- Disable: SCK, SDI, SCS floating, SDO output

high

¨ Bit 3 (MLS): MSB or LSB (1/0) shift first control bit

¨ Bit 2 (CSEN): serial bus selection signal enable/dis-

able (SCS), when CSEN=0, SCS is floating

¨ Bit 1 (WCOL): this bit is set to 1 if data is written to

SBDR (TXRX buffer) when data is transferred

writing will be ignored if data is written to SBDR

(TXRX buffer) when data is transferred

¨ Bit 0 (TRF): data transferred or data received

used to generate interrupt

Note: data receiving is still working when the MCU

enters the HALT mode

· SBDR: Serial bus data register

¨ Data written to SBDR

® write data to TXRX buffer

only

¨ Data read from SBDR

® read from SBDR only

¨ Operating Mode description

- Master transmitter: clock sending and data I/O

started by writing SBDR

- Master clock sending started by writing SBDR

- Slave transmitter: data I/O started by clock re-

ceived

- Slave receiver: data I/O started by clock received

Clock Polarity=Rising Edge or Falling Edge

(Configuration Option)

· Serial interface operation

¨ Master mode operation

Step1: Select CKS and select M1, M0 = 00, 01, 10

Step2: Select CSEN, MLS (the same as the slave)

Step3: Set SBEN

Step4: Writing data to SBDR

- data is stored in TXRX buffer

- output SCK and SCS signals

- go to step 5

Note: SIO internal operation:

* data stored in TXRX buffer, and SDI data

is shifted into TXRX buffer

* data transferred, data in TXRX buffer is

latched into SBDR

Step5: Check WCOL

- WCOL= 1, clear WCOL and go to step 4

- WCOL= 0, go to step 6

Step6: Check TRFor waiting for serial bus interrupt

Step7: Read data from SBDR

Step8: Clear TRF

Step9: Go to step 4

M L S

S B D R

( R e c e i v e d D a t a R e g i s t e r )

D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0

D a t a B u s

S D O B u f f e r

S D O

S D I

S B E N

A N D , S t a r t

S B E N

E N

I n t e r n a l B a u d R a t e C l o c k

S C K

C l o c k P o l a r i t y

M a s t e r

o r

S l a v e

A N D , S t a r t

E N

S B E N

M a s t e r o r S l a v e

C S E N

S C S

C 0

C 1

C 2

I n t e r n a l B u s y F l a g

S B E N

W r i t e S B D R

W r i t e S B D R E n a b l e / D i s a b l e

T D R F

A N D

W r i t e S B D R

W C O L F l a g

A N D , S t a r t

SIO Block Diagram

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