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DSP56721 Arkusz danych(PDF) 30 Page - Freescale Semiconductor, Inc |
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DSP56721 Arkusz danych(HTML) 30 Page - Freescale Semiconductor, Inc |
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30 / 54 page ![]() SymphonyTM DSP56720 / DSP56721 Multi-Core Audio Processors, Rev.1 Freescale Semiconductor 30 Figure 20. ESAI Transmitter Timing Diagram See Note SCKT (Input/Output) FST (Bit) Out FST (Word) Out Data Out Transmitter #0 Drive Enable (Internal Signal) FST (Bit) In FST (Word) In Flags Out Note: In network mode, output flag transitions can occur at the start of each time slot within the frame. In normal mode, the output flag state is asserted for the entire frame period. 62 64 78 79 82 83 87 86 86 84 93 88 85 91 89 92 90 91 94 63 Last Bit First Bit |
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