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LP5521 Arkusz danych(PDF) 47 Page - Texas Instruments |
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LP5521 Arkusz danych(HTML) 47 Page - Texas Instruments |
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47 / 51 page ![]() www.ti.com PACKAGE OUTLINE C 24X 0.3 0.2 2.4 0.1 24X 0.5 0.3 0.8 MAX NOTE 4 SOLDER BUMP 0.110 0.035 20X 0.5 2X 3 2X 2 3.4 0.1 B 4.1 3.9 A 5.1 4.9 (0.2) TYP WQFN - 0.8 mm max height NJA0024A PLASTIC QUAD FLATPACK - NO LEAD 4215212/A 04/2017 PIN 1 INDEX AREA 0.08 C SEATING PLANE 1 7 13 19 8 12 24 20 (OPTIONAL) PIN 1 ID 0.1 C A B 0.05 EXPOSED THERMAL PAD 25 SYMM SYMM NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance. 4. Package maximum height does not include the solder bump height. SCALE 2.800 |
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