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TLV702 Arkusz danych(PDF) 16 Page - Texas Instruments |
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TLV702 Arkusz danych(HTML) 16 Page - Texas Instruments |
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16 / 36 page ![]() COUT VOUT VIN GND PLANE CIN Represents via used for application specific connections IN GND OUT NC EN NC COUT VOUT VIN GND PLANE CIN Represents via used for application specific connections IN GND EN NC OUT 16 TLV702-Q1 SLVSC35D – AUGUST 2013 – REVISED JULY 2019 www.ti.com Product Folder Links: TLV702-Q1 Submit Documentation Feedback Copyright © 2013–2019, Texas Instruments Incorporated Layout Guidelines (continued) 10.1.2 Package Mounting Solder pad footprint recommendations for the TLV702-Q1 are available from the TI website at www.ti.com. The recommended layout examples for the DDC and DSE packages are shown in Figure 27 and Figure 28, respectively. 10.2 Layout Examples Figure 27. Layout Example for the DDC and DBV Packages Figure 28. Layout Example for the DSE Package |
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