M41ST85WMH6F datasheet(25/43 Pages) STMICROELECTRONICS

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M41ST85W

Clock operation

The watchdog timer can be reset by two methods: 1) a transition (high-to-low or low-to-high)

can be applied to the watchdog input pin (WDI) or 2) the microprocessor can perform a

WRITE of the watchdog register. The time-out period then starts over.

Note:

The WDI pin should be tied to VSS if not used.

In order to perform a software reset of the watchdog timer, the original time-out period can

be written into the watchdog register, effectively restarting the count-down cycle.

Should the watchdog timer time-out, and the WDS bit is programmed to output an interrupt,

a value of 00h needs to be written to the watchdog register in order to clear the IRQ/FT/OUT

pin. This will also disable the watchdog function until it is again programmed correctly. A

READ of the flags register will reset the watchdog flag (bit D7; register 0Fh).

The watchdog function is automatically disabled upon power-up and the watchdog register

is cleared. If the watchdog function is set to output to the IRQ/FT/OUT pin and the frequency

test function is activated, the watchdog function prevails and the frequency test function is

denied.

3.6

Square wave output

The M41ST85W offers the user a programmable square wave function which is output on

the SQW pin. RS3-RS0 bits located in 13h establish the square wave output frequency.

These frequencies are listed in Table 4. Once the selection of the SQW frequency has been

completed, the SQW pin can be turned on and off under software control with the square

wave enable bit (SQWE) located in register 0Ah.

Table 4. Square wave output frequency

Square wave bits

Square wave

RS3

RS2

RS1

RS0

Frequency

Units

None

–

32.768

kHz

8.192

kHz

4.096

kHz

2.048

kHz

1.024

kHz

512

256

128

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