Data Sheet

ADRF5702

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. A | 11 of 27

Figure 3. Pin Configuration

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

D7/CLK

Parallel Control Input for 16dB Attenuator Bit (D7). Serial Clock Input (CLK). See the Theory of Operation section for more

information. See Figure 5 for the interface schematic.

2

LE

Latch Enable Input. See the Theory of Operation section for more information. See Figure 5 for the interface schematic.

3

PS

Parallel or Serial Control Interface Selection Input. See the Theory of Operation section for more information. See Figure 5 for the

interface schematic.

4, 6 to 13, 15, 16

GND

Ground. The GND pins must be connected to the RF and DC ground of the PCB.

5

ATTIN

Attenuator Input. See Figure 4 for the interface schematic. This pin is DC coupled and matched to 50Ω. A DC blocking capacitor is

necessary.

14

ATTOUT

Attenuator Output. See Figure 4 for the interface schematic. This pin is DC coupled and matched to 50Ω. A DC blocking capacitor is

necessary.

17

VDD

Positive Supply Input. See Figure 7 for the interface schematic.

18

D0

Parallel Control Input for 0.125dB Attenuator Bit (D0). See the Theory of Operation section for more information. See Figure 5 for the

interface schematic.

19

D1

Parallel Control Input for 0.25dB Attenuator Bit (D1). See the Theory of Operation section for more information. See Figure 5 for the

interface schematic.

20

D2

Parallel Control Input for 0.5dB Attenuator Bit (D2). See the Theory of Operation section for more information. See Figure 5 for the

interface schematic.

21

D3

Parallel Control Input for 1dB Attenuator Bit (D3). See the Theory of Operation section for more information. See Figure 5 for the

interface schematic.

22

D4

Parallel Control Input for 2dB Attenuator Bit (D4). See the Theory of Operation section for more information. See Figure 5 for the

interface schematic.

23

D5/SEROUT

Parallel Control Input for 4dB Attenuator Bit (D5). Serial Data Output (SEROUT). See the Theory of Operation section for more

information. See Figure 6 for the interface schematic.

24

D6/SERIN

Parallel Control Input for 8dB Attenuator Bit (D6). Serial Data Input (SERIN). See the Theory of Operation section for more

information. See Figure 5 for the interface schematic.

EPAD

Exposed pad must be connected to the RF and DC ground.