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IS25LP02GJ-RHLA3 Arkusz danych(PDF) 21 Page - Integrated Silicon Solution, Inc |
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IS25LP02GJ-RHLA3 Arkusz danych(HTML) 21 Page - Integrated Silicon Solution, Inc |
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21 / 182 page  IS25LP02GJ IS25WP02GJ Integrated Silicon Solution, Inc.- www.issi.com 21 Rev.A 10/02/2025 WEL bit: Write Enable Latch (WEL) bit indicates the status of the internal write enable latch. When WEL bit is “0”, the internal write enable latch is disabled and the Write operations described in Table 6.3 are inhibited. When WEL bit is “1”, the Write operations are allowed. WEL bit is set by a Write Enable (WREN, 06h) instruction. Most of Write Non-Volatile/Volatile Register, Program and Erase instruction must be preceded by a WREN instruction. WEL bit can be reset by a Write Disable (WRDI) instruction. It will automatically reset after the completion of any Write Non-Volatile Register, Program and Erase operation. |
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