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ST7SCR Arkusz danych(PDF) 99 Page - STMicroelectronics |
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ST7SCR Arkusz danych(HTML) 99 Page - STMicroelectronics |
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99 / 101 page ![]() ST7SCR 99/101 17 IMPORTANT NOTES 17.1 UNEXPECTED RESET FETCH If an interrupt request occurs while a "POP CC" in- struction is executed, the interrupt controller does not recognise the source of the interrupt and, by default, passes the RESET vector address to the CPU. Workaround To solve this issue, a "POP CC" instruction must always be preceded by a "SIM" instruction. 17.2 FLASH DEVICES ONLY The behavior described in the following section (Section 17.2.1) is present on Rev W ST7FSCR devices only. They are identifiable: – on the device package, by the last letter of the Trace Code marked on the device package. – on the box, by the last 3 digits of the Internal Sales Type printed in the box label. Device Identification See also Figure 49. 17.2.1 SMART CARD UART AUTOMATIC REPETITION AND RETRY A functional limitation affects the Smart Card UART automatic repetition and retry on parity error in reception and transmission mode. This failure occurrence is systematic: only 4 retries option is functional. Figure 49Revision Marking on Box Label and Device Marking Trace Code marked on device Internal Sales Type on box label Flash Devices: “xxxxxxxxxW” 7FSCR1R4T1$U6 7FSCR1E4M1$U6 TYPE xxxx Internalxxx$xx Trace Code LAST 2 DIGITS AFTER $ IN INTERNAL SALES TYPE INDICATE SILICON REV. LAST LETTER OF TRACE CODE ON DEVICE INDICATES SILICON REV. ON BOX LABEL |
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