ST7LITE1XB datasheet(53/157 Pages) STMICROELECTRONICS

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ST7LITE1xB

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I/O PORTS (Cont’d)

10.7 DEVICE-SPECIFIC I/O PORT CONFIGURATION

The I/O port register configurations are summa-

rised as follows.

Standard Ports

PA7:0, PB6:0

PC1:0 (multiplexed with OSC1,OSC2)

The selection between OSC1 or PC0 and OSC2 or

PC1 is done by option byte. Refer to section 15.1

on page 148. Interrupt capability is not available

on PC1:0.

Note: PCOR not implemented but p-transistor al-

ways active in output mode (refer to Figure 32 on

page 50)

Interrupt Ports

Ports where the external interrupt capability is

selected using the EISR register

Table 10. Port Configuration (Standard ports)

Note: On ports where the external interrupt capability is selected using the EISR register, the configura-

tion will be as follows:

Table 11. I/O Port Register Map and Reset Values

MODE

DDR

floating input

pull-up input

open drain output

push-pull output

MODE

DDR

floating input

push-pull output

MODE

DDR

floating input

pull-up interrupt input

open drain output

push-pull output

Port

Pin name

Input

Output

OR = 0

OR = 1

OR = 0

OR = 1

Port A

PA7:0

floating

pull-up

open drain

push-pull

Port B

PB6:0

floating

pull-up

open drain

push-pull

Port

Pin name

Input

Output

OR = 0

OR = 1

OR = 0

OR = 1

Port A

PA7:0

floating

pull-up interrupt

open drain

push-pull

Port B

PB6:0

floating

pull-up interrupt

open drain

push-pull

Address

(Hex.)

Label

76543

210

0000h

PADR

Reset Value

MSB

111

LSB

0001h

PADDR

Reset Value

MSB

000

LSB

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