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V29LC51001 Arkusz danych(PDF) 3 Page - Mosel Vitelic, Corp |
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V29LC51001 Arkusz danych(HTML) 3 Page - Mosel Vitelic, Corp |
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3 / 12 page ![]() MOSEL VITELIC V29LC51001 3 V29LC51001 Rev. 0.5 October 2000 Functional Block Diagram Capacitance (1,2) NOTE: 1. Capacitance is sampled and not 100% tested. 2. TA = 25°C, VCC = 5V ± 10%, f = 1 MHz. Latch Up Characteristics(1) NOTE: 1. Includes all pins except VCC. Test conditions: VCC = 5V, one pin at a time. AC Test Load Symbol Parameter Test mSetup Typ. Max. Units CIN Input Capacitance VIN = 0 6 8 pF COUT Output Capacitance VOUT = 0 8 12 pF CIN2 Control Pin Capacitance VIN = 0 8 10 pF Parameter Min. Max. Unit Input Voltage with Respect to GND on A9, OE -1 +13 V Input Voltage with Respect to GND on I/O, address or control pins -1 VCC + 1 V VCC Current -100 +100 mA Address buffer & latches A0–A16 51001-05 I/O Buffer & Data Latches I/O0–I/O7 Y-Decoder 1,048,576 Bit Memory Cell Array X-Decoder Control Logic CE OE WE 51001-06 IN3064 or Equivalent IN3064 or Equivalent 2.7 k Ω 6.2 k Ω +5.0 V IN3064 or Equivalent IN3064 or Equivalent CL = 100 pF Device Under Test |
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