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V29LC51001 Arkusz danych(PDF) 5 Page - Mosel Vitelic, Corp |
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V29LC51001 Arkusz danych(HTML) 5 Page - Mosel Vitelic, Corp |
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5 / 12 page  MOSEL VITELIC V29LC51001 5 V29LC51001 Rev. 0.5 October 2000 AC Electrical Characteristics (over all temperature ranges) Read Cycle Program (Erase/Program) Cycle Parameter Name Parameter -90 Unit Min. Max. tRC Read Cycle Time 90 — ns tAA Address Access Time — 90 ns tACS Chip Enable Access Time — 90 ns tOE Output Enable Access Time — 40 ns tCLZ CE Low to Output Active 0 — ns tOLZ OE Low to Output Active 0 — ns tDF Output Enable or Chip Disable to Output in High Z 0 20 ns tOH Output Hold from Address Change 0 — ns Parameter Name Parameter -90 Unit Min. Typ. Max. tWC Program Cycle Time 90 —— ns tAS Address Setup Time 0 —— ns tAH Address Hold Time 45 —— ns tCS CE Setup Time 0 —— ns tCH CE Hold Time 0 —— ns tOES OE Setup Time 0 —— ns tOEH OE High Hold Time 0 —— ns tWP WE Pulse Width 45 —— ns tWPH WE Pulse Width High 35 —— ns tDS Data Setup Time 30 —— ns tDH Data Hold Time 0 —— ns tWHWH1 Programming Cycle —— 30 µs tWHWH2 Sector Erase Cycle —— 10 ms tWHWH3 Chip Erase Cycle — 2 — sec |
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