ST72141K2 datasheet(67/132 Pages) STMICROELECTRONICS

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ST72141K

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MOTOR CONTROLLER (Cont’d)

8.1.7 Register Description

TIMER COUNTER REGISTER (MTIM)

Read/Write

Reset Value: 0000 0000 (00h)

Bits 7:0 = T[7:0]:

MTIM Counter Value.

These bits contain the current value of the 8-bit up

counter.

CAPTURE Zn-1 REGISTER (MZPRV)

Read/Write

Reset Value: 0000 0000 (00h)

Bits 7:0 = ZP[7:0]:

Previous Z Value.

These bits contain the previous captured BEMF

value (ZN-1).

CAPTURE Zn REGISTER (MZREG)

Read/Write

Reset Value: 0000 0000 (00h)

Bits 7:0 = ZC[7:0]:

Current Z Value.

These bits contain the current captured BEMF val-

ue (ZN).

COMPARE Cn+1 REGISTER (MCOMP)

Read/Write

Reset Value: 0000 0000 (00h)

Bits 7:0 = DC[7:0]:

Next Compare Value.

These bits contain the compare value for the next

commutation (CN+1).

DEMAGNETIZATION REGISTER (MDREG)

Read/Write

Reset Value: 0000 0000 (00h)

Bits 7:0 = DN[7:0]:

D Value.

These bits contain the compare value for software

demagnetization (DN) and the captured value for

hardware demagnetization (DH).

AN WEIGHT REGISTER (MWGHT)

Read/Write

Reset Value: 0000 0000 (00h)

Bits 7:0 = AN[7:0]:

A Weight Value.

These bits contain the AN weight value for the mul-

tiplier. In autoswitched mode the MCOMP register

is automatically loaded with:

when a Z event occurs.

(*) depending on the DCB bit in the MCRA regis-

ter.

PRESCALER & SAMPLING REGISTER

(MPRSR)

Read/Write

Reset Value: 0000 0000 (00h)

Bits 7:4 = SA[3:0]:

Sampling Ratio.

These bits contain the sampling ratio value for cur-

rent mode. Refer to Table 23.

Bits 3:0 = ST[3:0]:

Step Ratio.

These bits contain the step ratio value. It acts as a

prescaler for the MTIM timer and is auto incre-

mented/decremented with each R+ or R- event.

Refer to Table 20.

ZP7ZP6

ZP5ZP4

ZP3ZP2

ZP1ZP0

ZC7

ZC6

ZC5

ZC4

ZC3

ZC2

ZC1

ZC0

DC7

DC6

DC5

DC4

DC3

DC2

DC1

DC0

DN7

DN6

DN5

DN4

DN3

DN2

DN1

DN0

AN7AN6

AN5AN4

AN3AN2

AN1

AN0

SA3

SA2

SA1

SA0

ST3

ST2

ST1

ST0

Zn x MWGHT

32(d)

-1 x MWGHT

32(d)

(*)

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