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ST72141K2 Arkusz danych(PDF) 17 Page - STMicroelectronics |
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ST72141K2 Arkusz danych(HTML) 17 Page - STMicroelectronics |
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17 / 132 page ![]() ST72141K 17/132 3 SUPPLY, RESET AND CLOCK MANAGEMENT The ST72141K includes a range of utility features for securing the application in critical situations (for example in case of a power brown-out), and re- ducing the number of external components. An overview is shown in Figure 9. Main Features s Main supply low voltage detection (LVD) s RESET Manager s Low consumption resonator oscillator s Main clock controller (MCC) Figure 9. Clock, RESET, Option and Supply Management Overview fOSC MAIN CLOCK CONTROLLER (MCC) LOW VOLTAGE DETECTOR (LVD) fCPU FROM WATCHDOG PERIPHERAL OSC2 OSC1 RESET VDD VSS fMOTOR_CONTROL OSCILLATOR RESET fSPI |
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