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AD7152 Arkusz danych(PDF) 22 Page - Analog Devices

Numer części AD7152
Szczegółowy opis  12-Bit Capacitance-to-Digital Converter
PDF  24 Pages
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Strona internetowa  http://www.analog.com
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AD7152 Arkusz danych(HTML) 22 Page - Analog Devices

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AD7152/AD7153
Rev. 0 | Page 22 of 24
The offset register of the AD7152/AD7153 allows for offset
calibration over the full capacitive input range. However, the
user must ensure that the offset to be removed is within 40% of
the full scale range; this can be achieved by using the CAPCAC
to perform a coarse offset calibration and use the system offset
calibration then to compensate for an offset within the 40% of
full-scale range pF of the CAPDAC.
The offset calibration register is reloaded by the default value
0x8000 at power-on or after reset. Therefore, if the offset
calibration is not repeated after each system power-up, the
calibration coefficient value should be stored by the host
controller and reloaded as part of the AD7152/AD7153 setup.
Note that the AD7152/AD7153 zero scale for differential mode
is around 0x8000; therefore, the offset register also needs a
value of around 0x8000, where the zero scale in single-ended
mode is 0x0000, with a required offset register value of 0x3000.
For more detailed information, see the Data Registers section.
TYPICAL APPLICATION DIAGRAM
SCL
VDD
GND
AD7153
SDA
3.3V
VSUPPLY
1kΩ
1kΩ
1kΩ
0.1µF
10µF
1µF
1µF
CIN1(+)
CSENS1
CSENS2
CIN1(–)
EXC1
C1
R1
C2
R2
C3
R3
C4
R4
47pF
10kΩ
ADP1720-3.3
HOST
SYSTEM
GND
Figure 41. Basic Application Diagram for a Differential Capacitive Sensor



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